NVIDIA's Clocks team is seeking an experienced ASIC Design Verification engineer to enhance the quality of clocking and reset logic for SOC and GPU ASIC products. The role involves sophisticated verification processes to ensure bug-free designs that support various applications, including Data Centers and self-driving cars. The engineer will work closely with architecture and design teams, utilizing industry-standard tools and methodologies. This position offers an opportunity to tackle complex problems and develop scalable solutions across platforms.

• BS or MS in EE/ECE or equivalent experience
• 3+ years of proven design verification experience
• Good understanding of Logic Design and Architecture
• Expertise in industry-standard verification flows like SV constraint random verification, UVM, and Formal Verification
• Strong coding skills in System Verilog, scripting languages (Perl/Python), and C++
• Prior experience in implementing Test plans for pre-silicon platforms

• Own validation of Clocking structures in Tegra and GPU products from start to finish
• Develop test plans, automation, and validation flows
• Identify and fix bugs during the validation process
• Collaborate with the clocks architecture and design team
• Coordinate with internal and external teams across time zones
• Develop scalable solutions for sophisticated verification problems

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.