The Chip Package Signal and Power Integrity Engineer at Google will focus on shaping the future of AI/ML hardware acceleration by driving cutting-edge TPU technology. This role involves working within a team that develops custom silicon solutions and requires collaboration with system architects, ASIC engineers, and other SI/PI engineers. The engineer will be responsible for chip package design, signal integrity, and power integrity simulation at both the package and system levels. This position offers the opportunity to influence the design and verification of complex digital designs that power Google's AI/ML applications.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience with SI/PI design for chip/package or system PCB.
• Experience in industry Signal integrity and Power Integrity (SIPI) modeling tool chains such as HFSS, ADS, Sigrity, and Siwave.
• Proficient in Python, Matlab, or C++ to establish automation flows and advanced data processing/analysis.

• Drive chip-package-system co-design by performing SI/PI analysis and optimization.
• Develop power integrity methodology for advanced package technology.
• Evaluate new package technology and development, and high-speed interface IP.
• Collaborate with chip design and system design teams to drive chip package SI/PI design targets.
• Provide feedback on chip floorplan considering package/system routability and SI/PI.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.