As a member of the CPU Cache Coherent Interconnects Design Team, you will focus on the physical design of CPU on-chip interconnect networks and last-level caches. This role involves implementation, synthesis, and timing closure, while collaborating with the logic design team on micro-architecture. You will have the opportunity to impact various product lines, including consumer graphics and self-driving cars. The position requires a dynamic approach in a technology-focused environment.

• Master’s Degree in Electrical Engineering, Computer Engineering, or Computer Science or equivalent experience.
• 5+ years of experience in processor or other related high-performance semiconductor designs.
• Physical design expertise in high-frequency design, including hands-on synthesis experience, timing analysis, and floor-planning.
• In-depth knowledge of industry standard physical design tools is required.
• Experience in interconnect/cache/core design is desirable.
• Verilog expertise is preferred along with a deep understanding of ASIC design flow including RTL design and verification, DFT, and ECO.
• Strong communication and interpersonal skills are required.

• Be responsible for synthesis and achieving timing, area, performance, and power goals of the on-chip interconnect network and last-level caches.
• Help evaluate the physical design for next-generation Nvidia coherent interconnects and system-level caches.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.