The CPU Physical Design Engineer role at Google involves working within a team dedicated to developing custom silicon solutions that enhance Google's consumer products. This position focuses on driving progress in digital physical design implementation, including synthesis, Place and Route, and timing closure. The engineer will collaborate with cross-functional teams to ensure optimal performance and efficiency in hardware design. This role is essential for shaping the next generation of hardware experiences that impact millions of users worldwide.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with digital physical design implementation, including synthesis, Place and Route, and timing closure.
• Experience in high-performance, low-power physical design implementation or design convergence with industry standard synthesis, PnR and signoff tools.

• Execute block-level physical design implementation from synthesis, Place and Route and design convergence via signoff checks.
• Analyze and resolve timing, congestion, and power issues to achieve optimal Power, Performance, and Area.
• Collaborate with cross-functional teams including RTL, Architecture, and DFT to align design constraints.
• Perform signoff activities, including Static Timing Analysis, physical verification, and power checks.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.