JobsSr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
AmazonSr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
AmazonLocation
Cupertino, CA
Type
Full-time
Posted
8/18/2026
Compensation
$183,000 - $247,600 per year
Undergraduate with 5+ Years of Experience
Master's with 5+ Years of Experience
Approval 98.6%·Filings 19,451·New hires 10,113·
👑 Elite Sponsor
·FY 2025Job description
The ASIC Design Engineer will be part of the Cloud-Scale Machine Learning Acceleration team at Annapurna Labs, focusing on the design and optimization of hardware for AWS data centers. This role involves working on custom SoCs that power machine learning servers, ensuring high design quality while making critical trade-offs. The team values mentorship and knowledge-sharing, fostering an inclusive environment for diverse experiences. Candidates will be expected to thrive in a collaborative setting, contributing to innovative technologies and architectures.
Requirements
- Bachelor's degree in Electrical Engineering or a related field
- 5+ years in RTL design for SOC
- 5+ years in VLSI engineering
- 5+ years with code quality tools including Spyglass, LINT, or CDC
- Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs
- Master's degree in electrical engineering, computer engineering, or equivalent
- 5+ years of practical semiconductor design work including full-chip and subsystem integration experience
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Experience with automation and scripting languages such as Python
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills
Responsibilities
- Implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Integrate multiple subsystems into top level SOC, ensuring correct clock/reset/functional/DFT signal routing.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
- Collaborate with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing and back-end teams to accomplish tasks.
Benefits
- Employees at Amazon are often offered comprehensive health benefits—including multiple medical plan options (no pre-existing condition exclusions, 100% covered in-network preventive care), dental and vision plans, a 24/7 medical advice line from day one, expert second-opinion services, and broad mental-health support with several free counseling sessions (including pediatric). Financial wellness typically includes a 401(k) with company match (up to 2%), Restricted Stock Units (equity), FSAs, an emergency savings program, product and partner discounts, and even college-savings and home-purchase programs. Overall, the package is designed to support employees and their families’ health, finances, and day-to-day life.
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