The Senior Staff Performance Codesign Engineer for TPU at Google will shape the future of AI/ML hardware acceleration by driving cutting-edge TPU technology. This role involves bridging the gap between model architecture innovation and next-generation hardware design. The engineer will work within a team focused on developing custom silicon solutions that enhance Google's AI/ML applications. The position requires collaboration with various teams to define the architectural roadmap for machine learning training and serving capabilities.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 12 years of experience in computer architecture, chip architecture, or hardware-software co-design.
• Experience developing systems for performance modeling, simulation, or system analysis.

• Define and drive the technical roadmap and architecture for the hardware/software stack to ensure performance for large ML models.
• Act as the technical liaison between advanced research, software, and hardware teams to maximize scaling and hardware efficiency.
• Architect and oversee the development of next-generation configurable simulation frameworks and performance models.
• Advocate system-level performance analysis across distributed ML systems to innovate methodologies for balancing compute and memory requirements.
• Manage cross-functional partnerships to influence organizational strategy and transition concepts into production.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.