The Senior ASIC Design Verification Engineer at Google Cloud will focus on shaping the future of AI/ML hardware acceleration by driving the development of cutting-edge TPU technology. This role involves collaborating with design and verification engineers to verify complex digital designs, specifically within TPU architecture. The engineer will leverage their expertise in design verification to create efficient verification environments and ensure the functionality of design blocks. The position is part of a team dedicated to redefining capabilities in AI and infrastructure.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience with design verification.
• Experience with SystemVerilog.
• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science is preferred.
• 10 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.

• Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.