The role involves overseeing the definition, design, verification, and documentation for the development of various CMOS mixed analog/digital blocks. The engineer will work on data converters, PLLs, and other components while determining architecture design based on system-level requirements. This position requires active involvement in all aspects of design, from system definition to circuit design and simulation. The engineer will also oversee layout and silicon evaluation, utilizing design tools such as Cadence ADE and MATLAB.

• Bachelor's Degree in Electrical Engineering and 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET.
• Master's degree in Electrical Engineering or related field.
• 2+ years of experience using one or more design tools such as CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.

• Use appropriate tools or databases to contribute to architecture and circuit designs for a small, well-defined block under some guidance.
• Work with layout teams to oversee block-level layout.
• Run simulations and basic analyses on designs; document and share results with leads, and utilize feedback to improve and verify designs.
• Program and run basic tests to identify bugs in own work; debug simple issues and escalate complex issues.
• Build understanding of one's technical domain to ensure integration with other components in the domain.
• Write technical documentation and design descriptions for straightforward projects under the direction of a supervisor.
• Contribute to conversations to generate new ideas.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.