This role is an individual contributor position within the CHS Signal Integrity organization at Qualcomm, focusing on signal integrity and power integrity architecture for various connectivity platforms. The engineer will act as the System SI/PI owner, ensuring alignment across silicon, package, and platform teams. The position requires expertise in high-speed interfaces and system margins, driving design convergence and compliance with industry standards. The role involves collaboration with cross-functional teams to achieve end-to-end SI/PI closure for programs.

• 4+ years of experience in Signal Integrity, Power Integrity, or high-speed systems.
• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field and 2+ years of relevant work experience, or a Master's degree with 1+ year of experience, or a PhD in a related field.
• Expertise in transmission line theory, EM fundamentals, and SI/PI interactions.

• Own end-to-end SI/PI closure for programs from pre-silicon to production.
• Define design targets and layout design guidelines for high-speed interfaces.
• Ensure SI/PI alignment with product KPIs such as performance, yield, power, and cost.
• Influence architecture decisions early in the product lifecycle.
• Lead design reviews and signoff decisions.
• Drive correlation between pre-silicon models and silicon/lab data.
• Lead debug of eye collapse, jitter margin issues, crosstalk, and power noise.
• Drive adoption of best practices across programs.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.