The ASIC Floorplan Design Engineer position at NVIDIA is aimed at new college graduates who are eager to design and implement cutting-edge SoCs and GPUs. This role offers the opportunity to influence the development of next-generation technology in a dynamic environment. The team is composed of exceptional individuals dedicated to pushing the boundaries of computing. Candidates will engage in early chip development and collaborate with various design teams to optimize floorplans.

• Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
• A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture.
• Experience in Verilog, System Verilog or similar HVL.
• Experience with CAD and physical design methodologies, chip floorplan, power/clock distribution, packaging, P&R and timing closure.
• Strong communication and interpersonal skills.

• Develop and optimize floorplans during early chip development.
• Drive the area review process and collaborate with the ASIC design team to identify improvement opportunities.
• Solve timing and routing congestion issues by influencing early design and physical implementation decisions.
• Build tools and improve existing infrastructure to optimize chip area and speed of execution.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.