Apple's Platform Architecture group is focused on developing next-generation hardware and verification systems for Apple silicon. The team aims to enhance pre-silicon validation through innovative simulation solutions. This role requires an engineer with a background in Design Verification who is eager to explore advanced verification techniques. The primary focus will be on improving simulation throughput for DV workflows through various design and infrastructure enhancements.

• Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field.
• Experience with SystemVerilog and EDA tooling.
• Experience with software development using C++ and scripting languages such as Perl or Python.
• Master's degree in Computer Engineering, Electrical Engineering, or another hardware-related field is preferred.
• 3+ years of relevant experience in Design Verification methodologies.

• Enable transformational improvements to simulation throughput for DV workflows.
• Design and implement testbenches and infrastructure improvements.
• Conduct platform research and development.
• Apply advanced Design Verification methodologies such as UVM and DPI-C.
• Collaborate with cross-functional teams across silicon engineering and EDA development.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.