The SMTS Silicon Design Engineer role at AMD involves working within the Radeon Technologies Group to develop cutting-edge designs. This position focuses on front-end design and integration, collaborating closely with architecture, IP design, physical design teams, and product engineers. The successful candidate will be detail-oriented and possess strong communication and problem-solving skills. This hybrid position is based in San Jose, CA.

• Bachelor's or master's degree in computer engineering or electrical engineering
• Understanding of Design for Test methodologies and DFT verification experience
• Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
• Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

• Implement and verify DFT architecture and features
• Perform scan insertion and ATPG pattern generation
• Verify ATPG patterns with gate-level simulation
• Conduct test coverage and test cost reduction analysis
• Provide post-silicon support to ensure successful bring-up and enhance yield learning

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.