The Chip Package Signal and Power Integrity Engineer at Google will focus on shaping the future of AI/ML hardware acceleration by driving cutting-edge TPU technology. This role involves collaborating with cross-functional teams to optimize chip package designs and ensure signal and power integrity. The engineer will work closely with system architects, ASIC engineers, and other SI/PI engineers to meet electrical requirements for chip, package, and system levels. This position is integral to the development of custom silicon solutions that power Google's most demanding applications.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience with SI/PI design for chip/package or system PCB.
• Experience in industry Signal integrity and Power Integrity modeling tool chains such as HFSS, ADS, Sigrity, and Siwave.
• Master’s degree or PhD in Electrical Engineering or SI/PI is preferred.
• Proficient in Python, Matlab, or C++ for automation flows and advanced data processing.

• Drive chip-package-system co-design by performing SI/PI analysis and optimization.
• Develop power integrity methodology for advanced package technology.
• Evaluate new package technology and high-speed interface IP.
• Collaborate with chip design and system design teams to define boundaries of chip design.
• Provide feedback on chip floorplan considering package/system routability and SI/PI.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.