The Senior ASIC Cloud Design Verification Engineer role at Google focuses on shaping the future of AI/ML hardware acceleration through the development of custom silicon solutions. This position is part of a team that drives cutting-edge TPU technology, which powers Google's most demanding applications. The engineer will leverage their expertise in design verification to ensure the functionality of complex digital designs, particularly in TPU architecture. The role involves collaboration with design engineers and participation in the full verification life cycle.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience with design verification.
• Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs.

• Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.