The RTL Design Engineer for TPU Compute at Google will focus on shaping the future of AI/ML hardware acceleration. This role involves driving the development of cutting-edge TPU technology that powers Google's demanding applications. The engineer will work within a team that develops custom silicon solutions and contributes to the innovation behind widely used products. The position emphasizes collaboration with design validation and physical design teams to ensure high-quality digital designs.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with digital design using SystemVerilog RTL.
• Experience with Computer Architecture.

• Create and review Compute subsystem's design microarchitecture specifications.
• Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
• Work with design validation teams to create test plans to verify and debug design RTL.
• Collaborate with physical design teams to ensure design meets physical requirements and achieves timing closure.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.