JobsSr. Staff Physical Design Engineer, EMIR Analysis & Signoff
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Sr. Staff Physical Design Engineer, EMIR Analysis & Signoff

Rivian

Location

Palo Alto, CA

Type

Full-time

Posted

9/15/2026

Compensation

$23,700 - $296,000 per year

Undergraduate with 5+ Years of Experience
H-1B FY202697.5% approval+60% YoY
👑 Elite sponsor

Job description

Rivian is seeking a highly skilled Physical Design Engineer specializing in Power Integrity and Signoff Analysis. The role focuses on ensuring the electrical reliability and performance of next-generation SoCs. The engineer will bridge the gap between physical implementation and electrical verification, emphasizing power analysis, electromigration, and IR drop mitigation. This position requires collaboration with various teams to optimize power consumption and ensure robust silicon performance.

Requirements

  • BS/MS in Electrical Engineering
  • 10+ years of extensive physical design experience at both block and sub-chip level, as well as full-chip level is a plus.
  • Deep understanding of Power Delivery Networks (PDN) and the physics of IR drop.
  • Good knowledge of PI and EM-IR sign-off requirements.
  • Proficiency in industry-standard PI/Signoff tools: Ansys RedHawk-SC, Cadence Voltus, or Synopsys PrimePower/Rail.
  • Experience with Multi-Voltage (MSV) designs and UPF/CPF power intent.
  • Knowledge of Chip Package Co-Design (CPM) and system-level power integrity.
  • Experience in high-performance designs where dynamic power is a critical constraint.
  • Strong scripting skills in Tcl, Python, or Perl for flow automation.

Responsibilities

  • Perform Static IR Drop analysis to validate the robustness of the power grid and ensure connectivity.
  • Conduct Dynamic Voltage Drop analysis using switching activity to identify hotspots during peak functional bursts.
  • Execute Signal EM and Power EM analysis to ensure long-term interconnect reliability.
  • Drive the signoff flow for deep sub-micron process nodes.
  • Analyze the impact of decoupling capacitor placement on transient noise and voltage stability.
  • Develop and enhance automated scripts to streamline PI analysis and reporting.
  • Define EM-IR signoff requirements and sign-off methodology.
  • Develop and support Chip-package-Co-Analysis and Chip-Power-Model on-die model for package and die co-design analysis.

Benefits

  • Employees at Rivian are often offered comprehensive health, dental, and vision insurance, a 401(k) with company match, ESPP and potential RSU grants, performance bonuses, and generous time off including paid parental and sick leave. Perks can include 24/7 mental-health coaching and therapy, Hinge Health for Anthem enrollees, tuition assistance and professional development, plus on-site food and a wide range of employee discounts on items like computers, mobile phones, home loans, and pet care.

H-1B filing history

Public USCIS petition and DOL LCA counts · latest USCIS FY2026, LCA FY2026

Filing entity: Rivian Automotive Llc

As of Aug 23, 2026

Initial approvals

101

FY2026

Approval rate

97.5%

FY2026

LCA certified

258

FY2026

Entry-level share

3.9%

FY2026

Initial approvals YoY

+60%

Trend

LCA certified YoY

-42%

Trend

Initial approvals by fiscal year

Approval rate by fiscal year

Continuing vs initial approvals

LCA certified positions by quarter

LCA certified positions by fiscal year

Based on public USCIS and DOL filings; not a sponsorship guarantee.

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