This role at Apple focuses on delivering complex digital IPs for Power Management ICs (PMICs) while collaborating with cross-functional teams. The position requires expertise in RTL design using SystemVerilog and involves synthesizing designs, performing simulations, and ensuring design specifications are met. The successful candidate will work on low-power design techniques and support silicon validation efforts. This role is essential for maintaining high standards in power, performance, and area targets.

• Master's degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
• Experience designing digital logic in ASIC using SystemVerilog.
• Experience simulating ASIC designs using Cadence or Synopsys System Verilog Simulators.
• Experience analyzing circuit behavior using Cadence Indago or SimVision waveform viewer.
• Experience synthesizing design into ASIC library gates using Synopsys Design Compiler or Cadence Genus.
• Experience using CDC and RDC tools for verifying clock and reset domain crossings.
• Experience performing chip tapeout signoff duties.

• Deliver complex digital IPs for Power Management ICs (PMICs) while meeting schedule, area, power, and performance targets.
• Perform RTL design in SystemVerilog for digital control logic, including FSMs and other control structures.
• Collaborate with teams to develop and finalize precise design specifications.
• Synthesize RTL designs into gates and analyze Power, Performance, and Area (PPA) impact.
• Apply low-power design techniques, including clock and power gating.
• Perform RTL simulation and functional verification to ensure correct functionality.
• Conduct Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) analysis and verification.
• Utilize scripting languages like Perl and Python for ASIC flow development tasks.
• Support the Silicon Validation team by explaining design functionality and providing debugging assistance.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.