The Signal and Power Integrity Engineer at Google will focus on shaping the future of AI/ML hardware acceleration by driving cutting-edge TPU technology. This role involves leading chip and package design to ensure optimal signal and power integrity performance. The engineer will collaborate with cross-functional teams, including chip design and system design, to develop custom silicon solutions. The position offers an opportunity to contribute to innovations that power Google's most demanding applications.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in SI/PI design for chip/package or system PCB.
• Experience in industry SIPI modeling tool chains such as HFSS, ADS, Sigrity, and Siwave.
• Experience with lab bring-up, test environments, and characterization for high-speed memory and SerDes.
• Experience in Python, MATLAB, or C++ to establish automated flows and data processing tools.

• Lead signal integrity (SI) and power integrity (PI) analysis and optimization for High-Performance Computing (HPC).
• Partner early in product definition to influence chip floorplanning and power distribution networks.
• Evaluate high-speed interface IPs and develop next-generation memory interfaces across IO PHY, SI/PI, and physical design boundaries.
• Drive post-silicon validation and qualification for new product introduction, balancing SI/PI performance and design for manufacturability constraints.
• Collaborate closely with silicon, system, and external vendor teams while developing simulation methodologies to enhance modeling accuracy and efficiency.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.