The SCG Architecture team is seeking a Senior Power Integrity Co-Design Engineer to lead voltage-noise mitigation across silicon, package, board, and platform. This role requires strong systems thinking and the ability to translate product noise targets into specifications while collaborating with various teams. The engineer will also apply AI to enhance engineering processes and ensure rigorous judgment is maintained. This position is critical for driving innovation and ensuring product reliability.

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience in silicon power integrity, voltage noise, or power delivery network design.
• Deep expertise in di/dt analysis and mitigation, voltage droop, PDN design, transient noise, and voltage regulator response.
• Hands-on experience with silicon bringup, characterization, and correlation.
• Strong instincts for Sim-to-Si correlation and system-level objectivity.

• Architect voltage-noise mitigation across the full stack including silicon, package, board, and platform.
• Co-design noise features with various teams including Circuit Design and Power-Arch.
• Define product-level voltage noise targets and drive them to closure.
• Build and own the Sim-to-Si correlation methodology for noise.
• Lead resolution of critical noise bugs during product bringup.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.