Intel Corporation is seeking a Quantum Packaging Signal/Power Integrity Engineer to join their Quantum Computing Group in Oregon. This role focuses on modeling and simulation of various packaging solutions, contributing to the development of scalable quantum systems. The team is pioneering silicon-based quantum processors and aims to revolutionize computing technology. Candidates will work collaboratively within a multidisciplinary team to advance Intel's silicon quantum dot technology.

• M.S. degree in Electrical Engineering, Physics or related field AND 3+ years of experience in SI/PI for packaging, silicon testchip, or other related hardware.
• Ph.D. degree in Electrical Engineering, Physics or related field with academic or work experience in the related areas.
• Experience in SI/PI modeling, simulation, and optimization with simulation software such as SIwave, HFSS, ADS, and related.
• Knowledge of SI/PI/thermal impact on IC substrate design choices.
• Design experience with large form factor IC substrates.

• Model and simulate packaging hardware including redistribution layers, IC substrates, and silicon testchip routing.
• Work closely with stakeholders to meet design requirements from both theory and hardware teams.
• Participate in creating requirements and novel packaging hardware for pathfinding projects.
• Conduct system-level modeling and simulation to ensure designs meet system-level requirements.
• Deliver and disseminate design milestones to stakeholders.
• Communicate designs through presentations and relevant documentation.
• Stay current with the latest developments in packaging technology and design techniques.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.