This role is part of AMD's FPGA Product and Platform development team, focusing on the technical execution of device programs within the Adaptive & Embedded Computing Group. The position emphasizes modern RTL design methodologies and advanced EDA tools, with a strong emphasis on collaboration across global teams. The ideal candidate will be passionate about hardware architecture and digital design, contributing to innovative silicon solutions. This role offers the opportunity to work on cutting-edge technology that drives the future of computing.

• Bachelor's or master’s degree in electrical engineering, computer engineering, or a related field.
• Strong understanding of the complete ASIC/SoC development flow, from RTL architecture through physical implementation and silicon bring-up.
• Strong RTL design and integration experience using Verilog and SystemVerilog.
• Experience working with high-speed interfaces and complex IPs such as HBM, Die-to-Die (D2D), SerDes, PCIe, and memory subsystems.
• Deep understanding of VLSI design principles, Design Automation methodologies, and IC development processes.
• Hands-on experience with industry-standard EDA tools such as Synopsys DFT Compiler, TestMAX, PrimeTime, VCS, and Cadence tool suites.
• Experience with UVM/OVM verification methodologies, testbench development, BFMs, simulation environments, and debug workflows.
• Proven experience implementing DFT solutions for large-scale SoCs, including scan, compression, MBIST, LBIST, boundary scan, and related test technologies.
• Strong scripting and automation skills using Perl, Tcl, Shell, Python, or similar languages.
• Excellent written and verbal communication skills, with the ability to effectively collaborate across geographically distributed teams.

• Participate in all stages of the design flow, from RTL development through GDS implementation.
• Design and implement RTL for complex digital and mixed-signal blocks using Verilog and System Verilog.
• Support physical design activities, including synthesis, DFT implementation, place-and-route, and Static Timing Analysis (STA).
• Collaborate closely with Functional Verification teams to support block-level verification using constrained-random and directed test environments based on System Verilog and UVM.
• Utilize scripting languages such as Perl, Tcl, Shell, and Python to maintain existing design automation flows and develop new tools supporting various aspects of design implementation.
• Partner with cross-functional teams across multiple engineering disciplines and geographic locations.
• Communicate regularly with global project teams to resolve technical issues and ensure project milestones and objectives are achieved.

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.