Qualcomm's validation team is seeking a candidate for SOC Infrastructure/NoC, Power and Performance Validation in both pre-silicon emulation and post-silicon. The team is responsible for ensuring the quality of SoC silicon and works closely with various engineering disciplines. The ideal candidate will have a strong understanding of digital design fundamentals and experience in validating and analyzing SOC bus architecture, performance, and power. This role requires collaboration with architects, designers, and software engineers to achieve performance-power trade-offs.

• Bachelor's degree in Science, Engineering, or related field and 5+ years of ASIC Design, Validation, Verification, or related work experience.
• Master's degree in Science, Engineering, or related field and 4+ years of ASIC Design, Validation, Verification, or related work experience.
• PhD in Science, Engineering, or related field and 3+ years of ASIC Design, Validation, Verification, or related work experience.
• Experience in embedded systems and expertise in C, C++, Python, and assembly languages.
• Thorough understanding of CPU and DDR concepts, multimedia, GPU, and memory hierarchy.

• Work closely with team members to develop performance validation plans.
• Analyze SOC bus architecture, performance, and power.
• Write programs to stress transactions for appropriate coverage.
• Debug low-level software and hardware issues.
• Factor in performance-power trade-offs during validation.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.