The Senior TPU Design Engineer role at Google focuses on developing custom silicon solutions that enhance the performance of Google's products. The team is dedicated to pushing technological boundaries in machine learning and hardware integration. This position requires a blend of technical expertise in RTL design and leadership experience in IP/SoC design teams. The engineer will contribute to innovative hardware experiences that impact millions of users worldwide.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture.
• 4 years of experience in leading IP/SoC design teams.
• Experience with ARM-based SoCs, interconnects, and ASIC methodology.

• Contribute to Machine Learning IPs for Google Silicon SoCs.
• Define microarchitecture details for machine learning processors and accelerators.
• Drive RTL development and debug functional/performance simulations.
• Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.