The Mid-level Physical Design Engineer CPU will join a team focused on developing next-generation CPU cores for various platforms including client, server, IoT, and AI. This role emphasizes delivering high-performance and power-efficient silicon through advanced process technologies. The engineer will work on block-level implementation within the RTL-to-GDS flow and will collaborate closely with cross-functional teams. This position offers opportunities for growth in physical design and SoC development.

• Bachelor's degree in Computer or Electrical Engineering or related field with 5+ years of relevant work experience, or a Master's degree with 3+ years of relevant work experience.
• Experience with integrated circuit design tools such as Synopsys or Cadence.
• Proficiency in scripting with TCL and at least one other interpreted language like Python or Perl.
• Experience in chip physical design verification including formal equivalence and timing checks.

• Execute physical design implementation for CPU core blocks or subsystems.
• Perform synthesis, floor planning, place and route (PnR), and design closure activities.
• Conduct static timing analysis (STA), power analysis, and physical verification.
• Identify and debug timing, power, and design rule violations.
• Contribute to achieving timing, power, and area (PPA) targets.
• Develop and maintain scripts for design automation.
• Collaborate with RTL design, verification, clocking, and full-chip teams.
• Support improvements to design flows, methodologies, and best practices.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.