The Defect Metrology Layer Owner at Intel is responsible for delivering high-quality analytical insights to minimize defects in the manufacturing process. This role involves working closely with process engineers to enhance tool and process capabilities. The team focuses on continuous improvement in safety, quality, yield, and productivity through advanced data analysis and real-time monitoring. Candidates should be passionate about data analysis and possess strong problem-solving skills.

• Bachelor's Degree in Electrical Engineering, Microelectronics Engineering, Material Science Engineering, Chemical Engineering, Mechanical Engineering, Optical Engineering, Statistics/Data Science, Chemistry, Physics, or related field of study
• 2+ years relevant experience in Semiconductor fabrication and processing techniques or a Master’s degree in a related field
• Experience with Statistical Process Control (SPC), Design of experiments (DOE) principles, and Statistical data analysis

• Perform detailed data analysis using various statistical/data mining tools to identify the root cause of defect issues.
• Identify exclusionary or baseline sources of defects and recommend or lead corrective actions and fixes.
• Lead or participate in continuous improvement projects on products and processes for improved defect performance.
• Provide expertise on process flow segments and control all aspects of defect analysis related to these areas.
• Lead or participate in multi-area problem-solving teams to provide defect reduction expertise to troubleshoot complex yield problems.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.