The Senior Circuit Timing Engineer at NVIDIA will be integral to groundbreaking processor design in deep submicron technologies. This role involves working within a global circuits team to innovate circuits for hardware security, adaptive clocking, and power management solutions. The engineer will drive timing analysis and signoff of custom circuit macros while collaborating with cross-functional teams to enhance NVIDIA's next generation products. The position emphasizes the integration of AI/ML techniques into the design process and methodology.

• BSEE/MS preferred in Electrical, Computer Engineering or equivalent experience.
• 6+ years of digital circuit design experience for Masters and 8+ years for Bachelors.
• Excellent understanding of deep submicron process issues and digital circuit design techniques is required.
• Expertise and in-depth knowledge of industry standard STA tools such as Nanotime, Primetime, Tempus, and other timing analysis tools.
• Hands on experience running Spice simulations, EM/IR analysis, and static timing analysis/closure is required.
• Proven experience in timing constraints generation and management.
• Hands on experience in design and analysis of low power circuits is a plus.
• Expertise in analysis and fixing of timing paths through ECOs including crosstalk and glitch noise.
• Solid understanding of extracted timing models and the usage of .libs in Primetime.
• Knowledge of process variation effect modeling and experience in design convergence in multi GHz deep submicron technology.

• Participate in groundbreaking processor design in deep submicron technologies.
• Work as part of a global circuits team to design innovative circuits for hardware security, adaptive clocking, and power management solutions.
• Drive timing analysis and signoff of custom circuit macros.
• Validate timing of custom circuit designs using STA tools and various SPICE simulation tools.
• Collaborate with cross-functional teams to improve power, performance, area, and reliability of products.
• Develop timing models and methodology for custom macro designs.
• Conduct transistor-level circuit design and timing, schematic entry, and layout delivery.
• Integrate AI/ML techniques directly into the design process and methodology.
• Work with various teams on timing signoff strategy, timing constraints, and timing ECO implementation.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.