Join the Design Technology Platform organization within Intel Foundry as a key member of the X-Chip Full-Chip Integration team. This role focuses on developing custom layout methodologies and leading full-chip physical integration for advanced semiconductor technologies. You will collaborate with experts across various disciplines to drive physical verification and tapeout execution. Ideal candidates will have a passion for custom layout design and advanced-node physical design methodologies.

• Masters' degree in Electrical Engineering, Computer Engineering, or a related field with 4+ years of industry experience, or a PhD in the same field with 1+ years of industry experience.
• Custom/analog/mixed-signal layout design experience in advanced technology nodes.
• Debugging skills in physical verification using industry-standard verification engines.
• Proficiency in Tcl, Python, or SKILL for automating layout creation and checking.

• Lead full-chip floorplanning, physical integration, and tapeout activities for advanced-node silicon development vehicles.
• Develop and enhance custom layout methodologies and physical design flows.
• Drive physical verification closure, including DRC, LVS, DFM, density, and antenna rule compliance.
• Collaborate with Technology Development, PDK, and EDA teams to implement scalable and manufacturable design solutions.
• Analyze advanced-node design rules and contribute to design enablement for emerging process technologies.
• Develop automation solutions using scripting languages to improve design productivity and quality.
• Coordinate cross-functional activities to ensure tape-in readiness and successful project execution.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.