The Senior Test Engineer for CMOS Backplane at Raxium, a Google company, focuses on developing and optimizing test solutions for microLED display panels. This role involves working closely with design engineers to ensure hardware meets quality and reliability standards. The engineer will also interface with test equipment and collaborate with various engineering teams to implement automated testing solutions. The position is critical in advancing Raxium's innovative semiconductor display technology.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field.
• 4 years of experience with Silicon, CMOS, and IC test development.
• 3 years of experience with Silicon test hardware, software debugging, and data analysis in an R&D or manufacturing environment.
• Master's degree or PhD in a related field is preferred.
• Experience with testing software development, Python, and SQL databases.

• Develop, validate, and optimize CMOS Backplane test solutions for microLED display panels.
• Interface with wafer-level probe cards, test equipment, and instrumentation for CMOS testing.
• Identify, diagnose, and resolve electrical issues during wafer-level testing.
• Collaborate with engineering teams to define and implement automated testing solutions.
• Work with the Test Engineering team to enhance test frameworks based on reliability requirements.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.