The Senior CPU RTL Engineer role at Google involves developing custom silicon solutions for the next generation of hardware experiences. This position is part of a team that focuses on CPU frontend designs, emphasizing microarchitecture and RTL design. The engineer will contribute to innovations that enhance performance and efficiency in Google's direct-to-consumer products. The role requires collaboration with architects and performance teams to propose and evaluate microarchitecture features.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
• Experience with logic synthesis techniques to optimize RTL code, performance, and power as well as low-power design techniques.

• Contribute to CPU frontend designs, emphasizing microarchitecture and RTL design for the next generation CPU.
• Propose performance enhancing microarchitecture features with efficiency in mind.
• Communicate pros and cons of microarchitecture enhancements and facilitate final decision making.
• Deliver designs meeting Power, Performance and Area (PPA) goals with production quality.
• Become familiar with techniques for at least one processor functional block and participate in the performance modeling effort.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.