This role at Apple involves analyzing and performing power reduction for advanced node technology and complex SoC design. The position focuses on implementing low power design techniques and ensuring design closure for tape out. The engineer will work closely with the logic design team to drive physical aspects early in the design cycle. This role requires a strong understanding of physical design workflows and the ability to resolve design and flow issues.

• Master's degree or foreign equivalent in Computer Engineering or related field
• 3 years of experience in the job offered or related occupation
• Experience with Innovus or Fusion Compiler APR tools for implementation design
• Knowledge of modern CMOS technology and fabrication fundamentals
• Proficiency in scripting languages such as TCL, Perl, or Python

• Analyze and perform static and dynamic power reduction for advanced node technology.
• Implement low power design techniques to meet power target goals.
• Perform critical ECOs to fix identified violations in design aspects.
• Execute chip/partition floor planning, pin assignment, and macro placement.
• Complete netlist to GDS2 implementation for partitions meeting schedule and design goals.
• Resolve and improve design and flow issues related to physical design.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.