The role at Qualcomm involves working on high-performance, low power Hexagon/NPU cores for mobile SOC, Server IoT, and Automotive applications. The successful candidate will have a deep understanding of the ASIC design flow from RTL to GDS2 and will tackle challenges associated with advanced technologies. This position requires expertise in RTL design, synthesis, and low power techniques, with a focus on microprocessor design and integration. The candidate will collaborate with various teams to innovate ASICs and IP cores.

• Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 2+ years of relevant work experience.
• Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 1+ year of relevant work experience.
• PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field.
• 2+ years of experience with high-performance microprocessor design.

• Work with the system architecture team to define micro-architecture documentation for various blocks in Hexagon/NPU and sub-system.
• Develop RTL for multiple logic blocks of Hexagon/NPU and sub-system for SoC integration.
• Run various frontend tools to check for linting, clock domain crossing, and power intent.
• Collaborate with the physical design team on design constraints and timing closure.
• Focus on area and power optimization.
• Work with the verification team to collaborate on test plans, test debugging, coverage plans, and coverage closure.
• Support internal hardware integration.
• Provide ideas and further the innovation of ASICs, IP cores, and process flows.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.