The role is part of the PTD Litho Frame Automation Team at Intel, focusing on process design rule definition and validation for next-generation process technology. The team is responsible for ensuring VLSI layout adherence to design rules and troubleshooting verification issues. Collaboration with various experts in lithography, integration, and device testing is essential for successful process implementation. The position requires both technical skills and a proactive mindset for continuous improvement.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 6+ months of hands-on experience, or a Master's degree with no prior professional experience.
• Coursework and background should include VLSI design or CAD, programming in Python or C++, and semiconductor device physics.
• Familiarity with semiconductor processing or computer science from coursework or internship experience is preferred.
• Strong communication and collaboration skills for cross-functional teamwork are essential.

• Verify VLSI layout adherence to complex layout design rules and ensure quality assurance of designs across all Intel process nodes.
• Troubleshoot design and PDK verification issues with complex physical design flows using both industry-standard and Intel tools.
• Write and update software code for cell design, test cases, verification, and package design content.
• Develop and support CAD design for the LTD Tape-in Collateral Library across all Intel Process Technology nodes.
• Collaborate with diverse teams to execute designs that will be used for process implementation, monitoring, and development.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.