JobsSenior Analog and Mixed Signal Design Engineer
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Senior Analog and Mixed Signal Design Engineer

Intel

Location

Hillsboro, OR, Santa Clara, CA

Type

Full-time

Posted

11/4/2026

Compensation

$141,910 - $269,100 per year

Undergraduate with 5+ Years of Experience
H-1B FY202694.2% approval-88% YoY
💎 Strong sponsor

Job description

The role is for a senior technical expert in high-speed SerDes circuit design within Intel's Advanced Design Foundational IP Organization. The High-Speed I/O team focuses on developing SerDes and die-to-die interface reference designs that optimize Intel's process technology with next-generation wireline standards. The position involves owning SerDes link architecture on leading technology test chips and providing technical leadership across various engineering teams. The candidate will be responsible for translating link requirements into design specifications and driving design-technology co-optimization.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Electrical and Computer Engineering with 6+ years of industry experience in high-speed wireline SerDes circuit design, or a Master's degree with 4+ years, or a Ph.D. with 2+ years.
  • Experience in transistor-level design of SerDes TX, RX, or clocking circuits in at least one silicon-proven design at 28 Gb/s per lane or higher.
  • Experience in SerDes link architecture, lab validation of high-speed links, or behavioral/statistical link modeling in MATLAB or Python.

Responsibilities

  • Define SerDes link architecture for next-generation interfaces including channel analysis and equalization partitioning.
  • Build and maintain system-level link models and derive block-level specifications for TX, RX, ADC, and clocking circuits.
  • Lead transistor-level design of critical SerDes blocks such as TX drivers and RX AFE.
  • Drive test-chip definition, integration, tapeout readiness, and silicon bring-up while correlating measured data against models.
  • Translate SerDes requirements into process and PDK requirements and drive design-technology co-optimization.
  • Provide technical leadership by mentoring engineers, leading design reviews, and representing Intel Foundry in technical engagements.

Benefits

  • Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.

H-1B filing history

Public USCIS petition and DOL LCA counts · latest USCIS FY2026, LCA FY2026

Filing entity: Intel Corp

As of Aug 23, 2026

Initial approvals

74

FY2026

Approval rate

94.2%

FY2026

LCA certified

2,201

FY2026

Entry-level share

0.1%

FY2026

Initial approvals YoY

-88%

Trend

LCA certified YoY

-54%

Trend

Initial approvals by fiscal year

Approval rate by fiscal year

Continuing vs initial approvals

LCA certified positions by quarter

LCA certified positions by fiscal year

Based on public USCIS and DOL filings; not a sponsorship guarantee.

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