The CPU Power Architect role at NVIDIA focuses on optimizing CPU power efficiency throughout the design cycle, from architectural modeling to silicon validation. The position requires collaboration with various engineering teams to identify power-saving opportunities and ensure high performance-per-watt goals. The architect will leverage technical expertise in power analysis and modeling while using silicon data for validation. This role is crucial for delivering efficient CPU products that integrate with NVIDIA's advanced technology stack.

• BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
• 5+ years of experience working in ASIC power measurement and optimization.
• Strong understanding of leakage and dynamic power in VLSI circuits.
• Experience with RTL and netlist power analysis tools such as Power Artist, PrimeTime PX, or equivalent.
• Familiarity with CPU microarchitecture and its impact on power.

• Model and estimate CPU power at C-model, RTL, and netlist stages using industry-standard tools.
• Identify inefficiencies and drive design improvements in collaboration with architects, RTL designers, and PD engineers.
• Create targeted power characterization tests for both simulation and silicon.
• Set up power measurement equipment and measure CPU power and performance in the lab.
• Partner with multiple engineering disciplines to achieve optimal power efficiency without compromising performance.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.