Qualcomm is seeking talented Physical Design Engineers to join their SoC and ASIC Design organization. The role involves contributing to various projects in high-performance computing, AI, mobile, automotive, and next-generation semiconductor technologies. Engineers will work on different aspects of Physical Design, including floorplan, timing analysis, and low power implementation. This position offers an opportunity to collaborate with world-class teams and develop leading-edge products on advanced process technologies.

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 2-10+ years of industry experience or relevant academic/project experience in Physical Design.
• Experience in ASIC/SoC Physical Design implementation.
• Strong problem solving and ASIC development/debugging skills.

• Execute and drive all stages of the physical design flow from synthesized netlist to tape-out.
• Develop and implement physical design solutions for complex, high-speed, and low-power ASICs and SoCs.
• Perform floorplanning, partitioning, power planning, and IR-drop analysis.
• Analyze and resolve timing violations, signal integrity issues, and physical design rule violations.
• Collaborate with architecture, RTL, DFT, verification, and methodology teams to ensure successful project execution.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.