As a Wireless SOC Design Verification Engineer at Apple, you will play a crucial role in the chip design effort, focusing on pre-silicon RTL verification across various levels of the SOC. You will collaborate closely with architects, designers, and firmware engineers to create reusable testbenches and verification environments. The team emphasizes energy-efficient design and innovative technologies that enhance user experience. You will also explore AI-assisted verification methods to improve workflows.

• BS degree and a minimum of 10 years of relevant industry experience.
• Hands-on experience across the verification cycle including test planning and coverage closure.
• Strong SystemVerilog and Verilog skills with knowledge of UVM.
• Solid understanding of digital logic design, SOC architecture, and microarchitecture.
• Experience with low-power verification and UPF.

• Own the verification scope from test planning through coverage closure and signoff.
• Build reusable testbenches and verification environments using modern methodologies.
• Verify power intent using UPF within your area of responsibility.
• Collaborate with cross-functional teams on various subsystems including Power Management Unit and PCIe.
• Contribute to AI-assisted verification efforts in test generation and debug.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.