Join Apple's wireless silicon development team, focusing on low power design for wireless communication SoCs. This role emphasizes energy-efficient design and innovative technologies that enhance user experience. You will work within a vertically integrated engineering team, contributing to the rapid delivery of functional products to millions of customers. Your expertise in power management logic will be crucial in this highly visible position.

• Minimum requirement of a bachelor's degree.
• Proven track record in power, clock, and reset management logic design.
• Proficiency in Verilog language.
• Experience in power management logic verification and debugging.
• Understanding of ASIC low power design techniques.
• Knowledge of CDC, RDC, STA, and UPF.
• Proficiency in scripting languages such as Shell, Perl, or Python.
• Knowledge and experience with common SOC components, including CPU, fabric, and peripherals.
• Strong problem-solving and analytical skills.
• Experience with SoC level power management logic.
• Experience with SOC top level integration.
• Knowledge of system architecture.
• Experience in post-silicon functional debug and power correlation.

• Design power management logic for complex wireless communication SoCs.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.