The ASIC Design Verification Engineer role at Google focuses on shaping the future of AI and machine learning hardware acceleration. You will work on cutting-edge TPU technology that powers Google's AI applications, contributing to the development of custom silicon solutions. The position involves collaborating with a team to verify complex digital designs, particularly in the context of TPU architecture. This role is part of the AI and Infrastructure team, which is dedicated to delivering breakthrough capabilities and insights at scale.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with design verification.
• Experience with SystemVerilog/Verilog.
• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science is preferred.
• 5 years of experience with industry standard tools, languages, and methodologies relevant to silicon-based ICs and chips.

• Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM.
• Identify and write coverage measures for stimulus and corner cases.
• Debug tests with design engineers to ensure functionally correct design blocks.
• Close coverage measures to identify verification holes and demonstrate progress towards tape-out.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.