This role at Apple involves working on verification and design for complex ASIC designs in a collaborative environment. The position focuses on extracting design features, developing verification plans, and implementing test benches. The team is responsible for debugging failures, running simulations, and ensuring the functionality of various Analog IPs and DFT features. Candidates will work closely with designers and test engineers to optimize testing processes and support multi-functional engineering efforts.

• Master's Degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
• 1 year of experience in the job offered or a related occupation.
• Experience utilizing VLSI Design and VLSI Architecture to understand complex ASIC designs.
• Proficiency in Verilog for debugging and verifying designs.
• Knowledge of Perl/Python/Tcl scripting for automating scripts and internal tools.
• Familiarity with CMOS devices and circuits.
• Experience in Digital Logic Gate Analysis and Design.
• Understanding of Test Automation and Test Methodology.
• Ability to perform Timing Analysis to debug complex timing bugs.
• Experience employing Synthesis and Simulation to debug RTL and netlist issues.
• Knowledge of DFT for generating ATE patterns and ATE debug.
• Understanding of memory operation behavior using knowledge of Memory Circuits.

• Review architecture and design specifications.
• Extract design features and develop attributes and verification plans.
• Work with designers to verify DFT implementation and run various checks.
• Implement test benches, assertions, and checkers while generating directed/constrained random tests.
• Debug failures and run RTL simulations/power aware gate level simulations.
• Supervise bugs and close coverage.
• Build custom testbenches with power aware designs.
• Generate collaterals and reports for the test.
• Perform simulations in RTL, Gate Netlist, and with X-propagation and UPF enabled.
• Generate pattern files with DV test scripts.
• Run playback simulations with the generated patterns.
• Handle schedules and support multi-functional engineering efforts.
• Assist in verification flows, automation scripts, and regressions.
• Work with test engineers to bring up functional and structural patterns for various Analog IPs and DFT features on Silicon.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.