Job description
The role at Apple involves physical design implementation and the development and testing of place and route flows for complex digital logic blocks. The team focuses on optimizing placement and timing, conducting various static timing checks, and ensuring power-related optimizations. Candidates will work with advanced tools and methodologies to achieve full chip timing closure and physical verification. This position is based in Beaverton, Oregon, and requires collaboration with diverse teams to drive innovation.
Requirements
- Bachelor's degree or foreign equivalent in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related field.
- Experience using Cadence Innovus and Synopsys ICC-2 for Place and Route of complex digital logic blocks.
- Familiarity with Primetime-SI for analyzing timing results and generating necessary fixes.
- Proficiency in using Calibre for understanding and debugging physical verification results.
- Knowledge of UPF and Conformal-LP for verifying low power intent.
- Experience with Voltus and Redhawk for generating EM and IR results.
- Ability to develop automation scripts using TCL, Python, and TCSH.
- Experience with Innovus CCOPT for analyzing and optimizing clock-tree.
- Understanding of semiconductor device physics for making PPA trade-offs.
- Proficiency in Verilog for design and verification.
Responsibilities
- Implement physical design of partitions and top level.
- Develop and test place and route flows.
- Conduct floor planning, pin assignments, and macro placement.
- Iterate over placement to achieve optimized placement and timing.
- Perform clock tree synthesis, optimization, and routing.
- Conduct setup, hold, transition, and other static timing checks.
- Run Static Voltage Droop and dynamic Voltage Droop for power optimization.
- Conduct formal checking and signoff, ensuring full chip timing closure.
- Perform physical verification and closure, including signoff checklist closure.
Benefits
- Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.
H-1B filing history
Public USCIS petition and DOL LCA counts · latest USCIS FY2026, LCA FY2026
Filing entity: Apple Inc
As of Aug 23, 2026
Initial approvals
1,065
FY2026
Approval rate
99.0%
FY2026
LCA certified
9,221
FY2026
Entry-level share
5.6%
FY2026
Initial approvals YoY
+30%
Trend
LCA certified YoY
-35%
Trend
Initial approvals by fiscal year
Approval rate by fiscal year
Continuing vs initial approvals
LCA certified positions by quarter
LCA certified positions by fiscal year
Based on public USCIS and DOL filings; not a sponsorship guarantee.
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