JobsDesign Verification Engineer
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Design Verification Engineer

Apple

Location

Cupertino, CA

Type

Full-time

Posted

11/6/2026

Compensation

Not listed

Master's Entry-Level
H-1B FY202699.0% approval+30% YoY
👑 Elite sponsor

Job description

This role at Apple involves verifying complex digital IPs in a collaborative environment with system architects and digital designers. The main focus is on creating precise block level specifications and developing verification plans to ensure functional and performance excellence. The position requires expertise in System Verilog and UVM for building test benches and achieving complete functional coverage. The successful candidate will also participate in code reviews and assist in architecting verification environments.

Requirements

  • Master's degree or foreign equivalent in Electrical and Computer Engineering or related field
  • Experience utilizing System Verilog to create block level verification elements
  • Experience utilizing Verilog and VHDL to debug design issues and identify root causes of bugs
  • Experience utilizing Digital Hardware Simulation to develop checkers and tests
  • Experience utilizing Object Oriented Programming and C to understand and debug firmware executions on chips
  • Experience utilizing Python, Perl, or algorithms to develop design verification automation flows
  • Experience utilizing chip simulations on CAD software including debugging simulation failures for bug hunting
  • Experience with Finite State Machine design and verification

Responsibilities

  • Verify complex digital IPs by working with system architects and digital designers
  • Create block level specifications that are clear and precise
  • Build verification plans to exercise functional, performance, stress cases, and error conditions in blocks
  • Own the creation of verification test benches using formal verification and UVM based simulation
  • Build test cases using System Verilog Assertions and constrained random UVM test cases
  • Participate in code reviews of other blocks in the chips and propose improvements for bug-free designs
  • Collaborate in developing precise design specifications for digital control blocks
  • Use design specifications to create block and chip level verification plans
  • Architect and create block level verification elements
  • Assist in architecting chips and system level verification environments
  • Debug test failures and work with designers to develop fixes
  • Use functional and code coverage to track progress and gauge tape out readiness

Benefits

  • Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.

H-1B filing history

Public USCIS petition and DOL LCA counts · latest USCIS FY2026, LCA FY2026

Filing entity: Apple Inc

As of Aug 23, 2026

Initial approvals

1,065

FY2026

Approval rate

99.0%

FY2026

LCA certified

9,221

FY2026

Entry-level share

5.6%

FY2026

Initial approvals YoY

+30%

Trend

LCA certified YoY

-35%

Trend

Initial approvals by fiscal year

Approval rate by fiscal year

Continuing vs initial approvals

LCA certified positions by quarter

LCA certified positions by fiscal year

Based on public USCIS and DOL filings; not a sponsorship guarantee.

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