This role at Apple focuses on the development and validation of chip designs through comprehensive testing methodologies. The team collaborates closely with design and micro-architecture teams to ensure alignment with functional and performance goals. The position emphasizes the creation of reusable verification environments and the automation of regression workflows. Candidates will be involved in analyzing simulation results and collaborating with cross-functional teams to meet project milestones.

• Master's degree or foreign equivalent in Electrical Engineering or related field.
• Experience in developing reusable SystemVerilog test benches with constraint-random and directed stimulus.
• Knowledge of Object-Oriented Programming (OOP) principles.
• Experience implementing Universal Verification Methodology (UVM).
• Proficiency in scripting languages such as Python, Ruby, or Perl.

• Review design and architecture specifications to ensure alignment with goals.
• Develop comprehensive test plans and coverage plans for chip design validation.
• Refine and design verification methodologies and test benches.
• Run and triage regressions to identify and resolve design issues.
• Communicate and collaborate with design, architecture, and software teams.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.