The Mixed Signal SVE team at Qualcomm is seeking a skilled engineer to support the silicon bring-up and validation of mixed signal IPs, including DDRPHY and SerDes. This role involves collaboration with various cross-functional teams to debug complex issues and ensure successful product launches. The engineer will also provide post-release support for PHY-related customer issues and develop firmware for regression testing. This position is critical in transforming 5G technology into impactful products.

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience, or a Master's degree with 3+ years, or a PhD with 2+ years.
• Hands-on experience with DDR/SerDes test development, debugging, and characterization.
• Proficiency in firmware development and scripting, preferably in Python.
• Solid understanding of JEDEC and other electrical/protocol specifications.
• Strong grasp of PHY circuitry fundamentals, including DLLs, I/O, and calibration.
• Familiarity with signal integrity and probing techniques for memory buses.
• Experience with lab instruments such as oscilloscopes, spectrum analyzers, and logic analyzers.
• Excellent communication skills, both verbal and written.

• Lead bring-up, debugging, and optimization of DDR/SerDes PHYs across post-silicon teams.
• Proactively identify and resolve issues to ensure successful product launches.
• Provide post-release support for PHY-related customer issues.
• Develop firmware and execute regression testing.
• Generate clear and detailed test reports and documentation.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.