As a member of the CAD group at Apple, you will support methodologies for gate-level glitch noise and static timing analysis to ensure the integrity of Apple silicon. This role involves learning and applying sign-off methodologies and production CAD flows under the guidance of senior engineers. You will collaborate with CAD and physical design teams, assisting with tool qualifications and executing tapeout ECO tasks. The position offers exposure to modern automation techniques, including AI-agent workflows, to enhance analysis across large SOC designs.

• BS in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 1-2 years of experience in CAD methodology, EDA support, or digital design.
• Foundational understanding of gate-level signal integrity concepts, including crosstalk glitch noise and static timing analysis (STA).
• Exposure to industry-standard SI and STA tools through coursework, internship, or self-study.
• Basic scripting skills in Python, Tcl, and/or Perl.
• Willingness to learn noise and timing sign-off and ECO concepts with team support.
• Ability to execute well-defined tasks with close guidance and mentorship.
• Coursework or project exposure to standard cell library noise characterization or SPICE simulation basics.
• Familiarity with place-and-route concepts and physical design flow basics.
• Curiosity about AI/LLM-assisted workflows for CAD scripting, report parsing, or automated triage.
• Good communication skills and eagerness to learn.

• Assist with applying established sign-off methodologies, noise margins, and tool qualification procedures for gate-level glitch noise and static timing analysis under senior engineer guidance.
• Run and maintain existing production CAD flows and scripts for core noise and STA tools, supporting constraint setup through tapeout sign-off.
• Help execute glitch noise analysis tasks, including checking glitch thresholds and propagation reports under supervision.
• Assist with root-cause analysis of crosstalk glitch and timing anomalies, learning to use established automated triage workflows and AI-agent pipelines.
• Work closely with design and physical design teams on noise and timing constraints and flow issues, escalating closure and waiver decisions to senior engineers.
• Help execute noise and timing ECO tasks to support design convergence toward tapeout.
• Participate in tool and version qualification activities, helping track QoR and performance data against golden baselines.
• Help maintain documentation and learn noise and STA best practices from the team.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.