AMD is seeking a Senior Systems Design Engineer to focus on developing chip package board PDN models and performing simulations to ensure optimal power integrity. The role involves defining specifications and strategies for power rails while debugging and resolving power integrity issues throughout various phases. Collaboration with architecture, silicon, package, and board teams is essential to deliver effective solutions. This position offers the opportunity to improve methodologies and automation processes within the team.

• Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic Engineering, or a related field.
• One year of experience in the job offered or a closely related engineering role.
• Experience with PDN fundamentals, power delivery design, and PI analysis.
• Proficiency in PI simulation tools such as RedHawk, Voltus, SIwave, Sigrity, and SPICE.
• Knowledge of silicon, packaging, and PCB power delivery constraints.
• Ability to analyze lab measurements and correlate them with models.
• Scripting or automation proficiency in Python, MATLAB, and Tcl.

• Develop chip package board PDN models and perform simulations to verify supply noise, impedance, and transient response.
• Define power integrity requirements, specifications, and decoupling strategies for all major power rails.
• Debug and root cause power integrity issues during bring up, validation, and production phases.
• Correlate silicon measurements with simulations and refine models accordingly.
• Collaborate with architecture, silicon, package, and board teams to deliver system aware power integrity solutions.
• Improve power integrity methodologies, automation flows, and analysis processes.

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.