As a SoC Logic Design Engineer at Intel, you will contribute to the development, coding, and simulation of system-on-chip designs. You will work within the Data Center Group, focusing on integrating various IP blocks and subsystems into complete chip designs. Your role will ensure that power, performance, area, and timing goals are met, impacting the delivery of advanced SoC solutions. This position offers an opportunity to collaborate on innovative projects that shape the future of technology.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 0-1 years of hands-on experience in logic design, or a Master's degree in the same fields with no prior professional experience.
• Advanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL.
• Basic knowledge of industry-standard tools for logic design, synthesis, and simulation.
• Basic knowledge of power, performance, and area optimization in SoC designs.
• Basic knowledge of timing analysis and static timing tools.

• Design and implement logic for SoC blocks and subsystems using RTL coding techniques.
• Integrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality.
• Conduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence.
• Optimize logic designs to meet power, performance, area, and timing targets.
• Review verification plans and resolve failing RTL tests to ensure correctness of design features.
• Collaborate with IP providers to integrate and validate IPs for SoC-level designs.
• Follow secure development practices to meet security objectives and address security threats in designs.
• Drive compliance with quality assurance standards for successful IP and SoC handoff.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.